IMPORTANT
QUESTION MAY/JUNE 2014
EE-DIGITAL
LOGIC CIRCUITS EXAM
PART-B
1. Problem from Quine Mc-Cluskey method (16)
2. Problem from Code converters (16)
3. Design (or) implementation of multiplexer
,de-multiplexer circuits (each 8)
4. Problem from designing the combinational
circuits. (16)
5. problem from simplification and implementation of
SOP and POS functions using gates (8)
6. problems from realisation of SR,D,T,JK flip flops
(8)
7. problems from analysis of synchronous sequential
circuits (16)
8. problems from design of synchronous sequential
circuits using flip flop(16)
9. design of counters (12)
10. draw the TTL inverter circuits (12)
11. explain the working of 2 input and 3 input TTL
totem pole NAND gate .(16)
12. explain the concept of concept ,operation and
characteristics of CMOS family. Draw the circuit of CMOS two input NAND gate
and explain its operation (16)
13. draw the circuit of CMOS using NAND and NOR
gates (6)
14. write a note on ROM and its type (16)
15. problem from designing a ROM circuits (8)
16. problem from implementing the Boolean function
with the PLA (12)
17. explain the design procedure of RTL design using
VHDL (16)
18. write the note on test benches and its types (8)
19. program using VHDL code can be asked (16)
(example : mod 16, full adder, half adder, counters,
multiplexers, de-multiplexer etc.)
20. problems of analysis of asynchronous sequential
circuits (16)
21. problems of design of asynchronous sequential
circuits (16)
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NOTE: THIS QUESTIONS ARE MOST IMPORTATNT OF
UNIVERSITY EXAMS MAY BE OR MAY NOT BE ASKED FOR UNIVERSITY EXAMS
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